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A Self-Aligned, Electrically Separable Double-Gate MOS Transistor Technology for Dynamic Threshold Voltage Application
A Self-Aligned, Electrically Separable Double-Gate MOS Transistor Technology for Dynamic Threshold Voltage Application
2003
Alexandre Talbot
Didier Dutartre
Y. Lefriec
F. Leverd
R. Pantel
M. Haond
T. Skotnicki
Malgorzata Jurczak
R. Gwoziecki
Damien Lenoble
Pascal Ribot
M. Paoli
J. Martins
B. Tormen
A. Grouiller
J. Galvier
S. Monfray
Keywords:
Electronic engineering
Transistor
Separable space
Threshold voltage
Materials science
double gate
Electrical engineering
Correction
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