Performance Analysis of Vertically Stacked Nanosheet Tunnel Field Effect Transistor with Ideal Subthreshold Swing

2021 
In this paper, a novel vertically stacked silicon Nanosheet Tunnel Field Effect Transistor (NS-TFET) device scaled to a gate length of 12 nm with Contact poly pitch (CPP) of 48 nm is simulated. NS-TFET device is investigated for its electrostatics characteristics using technology computer-aided design (TCAD) simulator. The inter-band tunneling mechanism with a P-I-N layout has been incorporated in the stacked nanosheet devices. The asymmetric design technique for doping has been used for optimum results. NS-TFET provides a low leakage current of order10−16 A, an excellent subthreshold swing (SW) of 23mv/decade, and negligible drain induced barrier lowering (DIBL) having a value of 10.5 mv/V. The notable ON to OFF current ratio of the order of 1011 has been achieved. The device exhibits a high transconductance of 3.022 × 10−5 S at the gate to source voltage of 1 V. The radiation effect of an alpha particle at different energies on NS-TFET is investigated. The injection causes drain current fluctuation for a short span and the result can serve as a guideline for designing of a robust circuit. NS-TFET shows tremendous improvement in short channel effects (SCE) and is a good option for advanced technologies.
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