A Multipole Approach towards On-Chip Metal Routing for Reduced EM Side-Channel Leakage

With the proliferation of smart inter-connected devices, the importance of securing computational data has increased manifold. While computational security layers like cryptographic algorithms protect against software-domain vulnerabilities, it cannot prevent leakage of electromagnetic (EM) fields from its parent device - compromising physical layer security. Most proposed methods of reducing EM side-channel leakage involve incorporating complex blocks into the design of an integrated circuit (IC). In this paper, we take an entirely novel stance however - by borrowing fundamental concepts from multipole electromagnetic field decay, and adapting the same for ICs by proposing a multipole routing approach. By building proof-of-concept scaled-up routing in PCBs, we demonstrate that unlike conventional dipole-style routing, metal layers incorporating higher order multipoles result into a much faster decaying side-channel leakage. Through detailed measurements, we infer guidelines towards optimizing the order of multipole needed to minimize side-channel leakage, thus enabling convenient implementation of physical layer security.