Virtual machine simulating method and computer device

The invention relates to simulation method and a device for TLB (Translation Look-aside Buffer) in a virtual machine, wherein the method comprises the following steps: the virtual machine fills the TLB table entry of a target CPU (Central Processing Unit) in the TLB of a local CPU, and when the target CPU needs to carry out a memory accessing instruction, the virtual machine translates the memory accessing instruction into a memory accessing instruction capable of being executed by the local CPU; when the virtual machine executes the translated memory accessing instruction, the TLB of the local CPU converts the virtual address carried by the memory accessing instruction into a physical address for accessing of the translated memory accessing instruction, thereby completing the memory accessing operation of the memory accessing instruction executed by the target CPU. According to the invention, the simulation on the TLB in the heterogeneous virtual machine is realized by the method of combining hardware and software, and the simulation efficiency of the TLB is improved.