TO IMPLEMENT POSITIVE FEEDBACK ADIABATIC LOGIC (PFAL) - NAND TECHNIQUE ON LOW POWER ZIGBEE APPLICATIONS FOR PROCESSOR APPLICATIONS

Abstract In recent years, field of Microprocessor and system world, where Zigbee is one of most important device for collect and transmitting the information from patient body and particular place to remote stations with efficient way. Power consumption is most important one for wireless devices. In present, most of the wireless devices are designed and developed by various design methodologies. Where logical system is complex for designing the wireless devices. In this paper, we propose a novel method of positive feedback adiabatic logic (PFAL) NAND technique for low power zigbee applications for processor field. Here to implement positive feedback adiabatic logic – NAND technique on low power zigbee applications is to be proposed. It employs the concept of adiabatic charge recovery. The circuit design has the less power consumption for the application of zigbee low power mode this become critical concern. The adiabatic logic refers to a system in which a transition may occur without energy that is in the form of heat. It is the low power circuits which help to use reversible logic to conserve energy. The adiabatic circuits are operating on the principle of adiabatic charging and discharging process. It is to be used for partial energy recovery circuit and it has the lowest energy consumption which is compared to similar relatives. It is the best robustness which is against technological parameter variations.