High performance device utilizing ultra-thick-strained-Si (UTSS) grown on relaxed SiGe

2005 
We demonstrate a highly manufacturable substrate-induced strained Si device, which is compatible with the conventional Si bulk process. It utilizes ultra-thick-strained Si (UTSS) layer thicker than 3000 /spl Aring/ and relaxed SiGe layer with low Ge content less than 10%. The UTSS n-MOSFET gives 6 /spl sim/ 12% increase in I/sub on/ according to the gate length without the cost of increase in I/sub off/. In addition, more than 5% increase in I/sub on/ for p-MOSFET can be obtained by hybrid stress of UTSS and SiGe source/drain process. We also emphasize the importance of the ratio of channel resistance (R/sub CH/) to source-drain resistance (R/sub SD/) for performance enhancement.
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