SA 19.1: A 10Gbls %Bipolar TWRX Chipset for Computer Data Transmission
1998
With Internet host counts doubling every five to seven months, there is a pressing need for high-speed interconnect circuits in routers, switches, and computer systems [1]. These transmitter (TX) and receiver (RX) chips for 10Gb/s serial data transmission provide clock generation, 16:1 multiplexing, clock recovery, 1:16 demultiplexing and loss of signal (LOS) detection. No errors are seen in a 24-hour test period across 21 feet of 0.190" diameter coax, implying a BER better than 10-14 and demonstrating the feasibility of short-distance 10Gb/s transmission using copper-based links. The monolithic 3.0W TX and 5.5W RX chips are implemented in a 25GHz fT Si-bipolar process [2]. A data rate of 40% of fT is the highest reported architectural performance for a chipset at this level of integration.
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