Fabrication Yield Analysis andEmission Failure Investigation ofSilicon Field Emission Arrays
2005
A fabrication uniformity andyield analysis forsilicon field emission arrays ispresented inthis paper. Silicon field emission arrays havebeenchosen forspace neutraliser application because oftheir lowpowerconsumption, lowmassandvolume, andthey aremoretolerant ofthe operating environment thanmetal emitters. Silicon emitters werefabricated on4-inch silicon wafers withspacing of10pmbetween emitters, and765emitters inonearray. Tomeettherequired 6mAemission current, overa thousand arrays willbewirebondedtogether after aresistance probe test. Inthis case, the uniformity offabricated silicon emitters across theactive areaofthewafer isveryimportant. Duetothefundamental limits oftheplasma etchprocess, somenon-uniformity inthemicroscaled silicon tips across thewaferisinevitable. After careful calibration oftheplasma etch process, anuniformity of15%hasbeenachieved onwaferscale process.' Anexample is showninthegraph obtained byagroup ofarrays selected along thediameter ofawafer (Fig. 1).Thevariation ofgate diameters andtipheight isabout 10-15% within the3.5-inch active area ofthewafer. Thecurrent-voltage (i-V) characteristics showed that thevariation ofswitchonvoltages isabout 12%after proper conditioning ofthetips toremovesurface contamination. Theemission current perarray andgateleakage current arenotsignificantly affected bythe gate-tip dimension variations atlowemission current levels (
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