Design and measurements of test element group wafer thinned to 10 /spl mu/m for 3D system in package

We designed and measured test element group wafers thinned to 10 /spl mu/m for 3D system in package. The n-well p-Si diodes in 10 /spl mu/m thick wafer showed increasing of the reverse saturation current in comparison to the currents in 20 /spl mu/m, 30 /spl mu/m or 640 /spl mu/m thick wafer. While the pMOSFETs and nMOSFETs in 10 /spl mu/m thick wafer showed no degradation of mobility, sub-threshold swing and threshold voltage. Defects might be induced by mechanical stress during wafer back grinding process near wafer back side, within a few micron-meters from the wafer back surface.