A 920MHz 16-FSK Receiver Achieving a Sensitivity of −103dBm at 0.6mW Via an Integrated N-Path Filter Bank

This paper presents the first low-power IC implementation of a 16-FSK receiver towards enabling energy-efficient wide area networking. The receiver specifically exploits the inherent 5.1dB E b /N 0 advantage of 16-FSK over BFSK to improve sensitivity over prior-art, all while minimizing power via a bank of 16 integrated N-path filters for 16-FSK tone selection. Implemented in 65nm chip, the receiver achieves a sensitivity of −103dBm at a data rate of 100kbps, all at a power consumption of 0.6mW.