Multiple false targets jamming method based on FIFO

Efficient active jamming method against modern high resolution radars has been an important research topic in recent decades. The proposed researches introduce many methods to produce false targets jamming or noise depressing jamming. But many of them are somewhat complicated, with too much computing resources, and not possible to be implemented. This paper proposes a practical implementation method of multiple false targets jamming method based on FPGA, high speed AD converter and DA converter. According to the theory of matched filter in linear frequency modulated (LFM) radar, the delayed radar signal will result in a false target. Inspired by this property, we propose an active jamming method capable of generating multiple false targets based on first-in first-out (FIFO) in FPGA. The digital signal processing procedures in FPGA and the considerations on overflow of the superposition of multiple false targets are elaborately introduced. At last the FPGA implementation of the proposed method is introduced in detail and simulation results validate the effectiveness and correctness of our work.