OTA-Free MASH 2–2 Noise Shaping SAR ADC: System and Design Considerations

A multi-stage noise shaping (MASH) analog to digital converter (ADC) architecture is presented in this paper. This architecture combines the features of noise shaping SAR (NS-SAR) with the MASH scheme to achieve a higher order noise shaping. This ADC does not suffer from the complexity issue of conventional MASH delta sigma (ΔΣ) structures, and it does not require operational transconductance amplifier-based analog integrators. It also exhibits a high resolution and moderate bandwidth while using a low oversampling ratio (OSR). These merits make the introduced architecture suitable for large number of applications, such as internet of things (IoT) and biomedical devices. The paper proposes MATLAB behavioral models along with macro models used to simulate the presented architecture to show the efficiency of the proposed ADC featuring a signal-to-quantization-noise ratio (SQNR) of 105 dB for an OSR of 10 at a sampling frequency of 10 MHz.