Demonstrating POF based optoelectronic interconnect in a multi-FPGA prototype system

The goal of our work is demonstrating the viability of massively parallel optical interconnect between electronic CMOS VLSI chips. Here we describe the definition and realisation of a systems architecture in which these interconnections can play a meaningful role. The architecture is a multi-FPGA system with low level optoelectronic interconnects introduced into the FPGA chips. A demonstrator, reaching 10 Gbit/s/chip aggregate bit rate with small-scale custom made optoelectronic FPGAs, shows the feasibility of this approach.