Video encoder in compliance with scalable mpeg2

PROBLEM TO BE SOLVED: To obtain the digital video encoder system in compliance with the scalable architecture MPEG2 by providing an I frame exclusive use video encoder module provided with a discrete cosine transformation processor or the like. SOLUTION: A single I frame video encoder module conducts all external communication requiring a pixel interface 641, a host interface 611 and an output data interface 679. The I module is a master interface of an encoder and one of basic items in a field of video compression application using a chip set. This chip includes a programmable processor 621 in addition to an entropy coding function, that is, a discrete cosine transformation processor unit 671, a quantization unit 673 and a variable length encoder unit 675. Furthermore, an interface having already built up again is added and a processing function to be applied before coding is included.