Prediction of stress-induced characteristic changes for small-scale analog IC

2008 
Stress-induced parametric changes during the resin-molded packaging of a small-scale integrated circuit (IC) smaller than 1.0 mm 2 have been evaluated by a specially designed test chip. Multiple test chips with different resistor locations have been fabricated and measured by die-to-die correspondence. One contour plot was reproduced from the measurement results. The present paper shows the distribution of parametric change for the small-scale IC. In addition, a new method for evaluating the circuit performance change due to stress-induced parametric changes is presented.
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