Not your parents' physical address space

A physical memory address is no longer the stable concept it was. We demonstrate how modern computer systems from rack-scale to SoCs have multiple physical address spaces, which overlap and intersect in complex, dynamic ways, and may be too small to even address available memory in the near future. We present a new model of representing and interpreting physical addresses in a machine for the purposes of memory management, and outline an implementation of the model in a memory system based on capabilities which can handle arbitrary translations between physical address spaces and still globally manage system memory. Finally, we point out future challenges in managing physical memory, of which our model and design are merely a foundation.