A High-Speed 32×32 b Multiplier Implementation Using Improved Radix-4 Booth Coders

This paper presents a high-speed 32× 32 b signed/unsigned multiplier with modified radix-4 Booth encoding. Every partial product is sign-extended correctly and efficiently by sign compensation algorithm. The multiplier is optimized by a modified Wallace tree that consists of mixed compressors. The speed is 250 MHz by adding pipeline, and the multiplier can be used as macro cell of datapaths.