The effects of ferroelectric capacitor testing methods on predicted imprint failure points

Abstract The imprint mechanism in ferroelectric capacitors is a well known cause for ferroelectric memory cell failure. Various test methodologies for accelerating the imprint effect for failure point due to imprint predictions have been proposed. These methods include testing the sample at elevated temperature, biasing the sample at elevated temperature, and fatigue cycling the sample prior to and during imprint testing. A parametric study was conducted using various test conditions to determine which conditions or combination of conditions had the greatest effect on the measured imprint rate. Data will be presented to show the relationships between the test method used and the measured imprint rate. A figure of merit which can be used for comparisons of the imprint rate of multiple test samples as well as failure point prediction will also be presented.