Integration of a Piezoelectric Layer on Si FinFETs for Tunable Strained Device Applications

2014 
Earlier theoretical reports predicted that the usage of a piezoelectric stressor layer around the FinFET, i.e., the PiezoFET, offers a great potential for steep subthreshold slope devices. For the first time, we analyzed the practical realization of such PiezoFETs comprising a piezoelectric stressor layer, lead–zirconate–titanate (PZT), and aluminum–nitride (AlN) deposited on n-type silicon FinFETs. A high-piezoelectric response in the range of 100 pm/V has been obtained for the PZT PiezoFET evidencing the converse piezoelectric effect in the device. The piezoelectric response for the AlN device was much less (13 pm/V) as expected. Underlying device properties, such as subthreshold swing (SS) and low-field electron mobility have been significantly affected by the presence of the PZT stressor. A 20%–50% change in the mobility and a change in the SS (about 5 mV/decade) have been observed. The change can be attributed to the strain induced reduction of the interface trap density at the ${\rm Si}/{\rm SiO}_{2}$ interface. This strain is partly formed by the bias over the piezoelectric layer, which indicates the converse piezoelectric effect related tunable strain in both the silicon channel and gate oxide.
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