Multichannel time-to-digital converters with automatic calibration in Xilinx Zynq-7000 SoC devices

This paper proposes a weighted histogram calibration method and an automatic calibration architecture to implement high-linearity time-to-digital converters (TDCs) in low-cost ARM-based System-on- Chips (SoCs). The proposed method significantly reduces the nonlinearity introduced by nonuniform bins. It offers automatic calibration without manual interventions using ARM processors. Besides, our design is cost-effective in hardware consumption. We implemented and evaluated a 16-channel TDC system in a low-cost Zynq-7000 ARM- based SoC, in which the programable logic is equivalent to a 28 nm Artix-7 FPGA. The proposed TDC offers a resolution of 9.83 ps with good uniformity, achieving an averaged DNL(pk-pk) of 0.38 LSB, and an averaged INL(pk-pk) of 0.63 LSB.