A Survey of FPGA Based on Graph Convolutional Neural Network Accelerator

In recent years, with rapid development of deep learning, neural networks have been explored thoroughly and regularly structured neural networks has been more powerful than ever. However, people are still suffering from trying to adapted conventional techniques to unstructured data structures. This paper introduces theoretical basis for graph convolutional networks, and the concept behind FPGA acceleration. Besides, this paper introduces different FPGA based approaches trying to accelerate the procedures of graph convolutional networks. The paper ends with a view into the future, proposing shortcomings of the current design approaches as well as challenges for future ones.