Addressable test structures for MOSFET variability analysis

Aggressive scaling of CMOS transistors has increased variations in threshold voltages, drive currents and gains. In order to meet circuit performance targets, the designer requires detailed knowledge of variability to enable manufacturable products. This paper presents a 4-bit addressable array-based test structure with a centre reference transistor allowing evaluation of variability in advanced technologies. We demonstrate a method of verifying the region in which the measurements of transistors in the array are valid.