The Performance Investigation of Junctionless Transistor By Considering Different Recessed Gates

In this paper, the performance of junctionless transistor with three different recessed gates is investigated by numerical simulation. Then the impact of sidewall and the overlapped gate is discussed. The results show that the different recessed gates change the threshold voltage of devices. As compared between the three proposed devices, the gate-over structure has more superior subthreshold characterictics and drain current peformance. The sidewall angle variation in the gate-over devices is also studied. It will offer a helpful guide for fabricating the junctionless transistor with recessed gates.