High Performance Circuit Techniques for Nueral Front-End Design in 65nm CMOS

Integrated low noise neural amplifiers become recently practical in CMOS technologies. In this paper, a low noise OTA technique has been proposed while keeping the power consumption constant. A capacitive feedback, ac coupled 46dB amplifier with high pass cutoff frequency close to the 90Hz has been achieved. The proposed amplifier has been implemented in 65nm CMOS technology; at room temperature circuit consumes 323uA current from 1.2V power supply. The circuit occupies 2627um 2 silicon area.