Comparison of NMOS and PMOS transistor sensitivity to SEU in SRAMs by device simulation
2003
The off-NMOS and off-PMOS transistor single-event upset (SEU) sensitivities are studied in a 0.6-/spl mu/m SRAM. In some cases, the off-PMOS sensitivity is shown to be similar to the off-NMOS one. This could affect SEU rate calculations.
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