Effectiveness of Hardware-Level Techniques in Detecting Transient Faults

Transient faults might induce soft errors in integrated circuits. Typically, fault and error detection during the normal integrated circuit (IC) system operation is called concurrent error detection (CED). Several CED techniques have been proposed with the intent to design more reliable computing systems. These techniques mainly differ in their detection capabilities and in the constraints they impose on the system design. This chapter evaluates and compares different techniques regarding their effectivenesses in detecting transient faults arisen in combinational logic blocks, and resulting in soft errors (SEs).