A 10-Bit Radiation-Hardened by Design (RHBD) SAR ADC for Space Applications
2017
This work presents a rad-hard by design (RHBD) 10-bit 1MHz SAR ADC for space applications. The goal is to design a radiation tolerant SAR ADC by using radiationhardened by design (RHBD) techniques both at circuit and layout levels. The various influences of the radiation which could degraded the circuits in harsh and radiation environments have been taken into account by the design. A conventional SAR ADC with charge redistribution capacitive DAC has been the starting point to whom RHBD techniques have been applied. The SAR was implemented and fabricated in a 0.15-um CMOS standard process by LFoundry. The prototype active area is 212x285 um2 and consumes 1.23mW. Measurement results show an ENOB equal to 9.6 bits in the band of interest, [1-10]kHz, at full-scale input voltage. The resulting figure of merit is 792 fj/conversionstep.
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