Design and implementation of high-speed configurable RSA accelerator

2012 
To implement high-speed configurable RSA accelerator,a pipelined modular multiplier architecture based on radix—64 Montgomery modular multiplication algorithm and its corresponding configurable memory architecture are proposed.With parallel calculation of five-stage pipeline and configurable memory,it fulfills RSA calculation ranging from 256-bit to 2048 bit efficiently.As is shown in experiment,compared with other related works,the proposed pipeline architecture can reach better tradeoff between performance and resource.The accelerator is able to increase the performance of modular multiplier and total data throughput.With 73-kilo gates,it achieves 333 kbps data throughput for 1024-bit RSA calculation.
    • Correction
    • Source
    • Cite
    • Save
    • Machine Reading By IdeaReader
    0
    References
    0
    Citations
    NaN
    KQI
    []