Are Si/SiGe Tunneling Field-Effect Transistors a Good Idea?

Introduction. The ability to scale CMOS to future technology nodes is jeopardized primarily by power constraints. Supply voltage scaling is the best method to reduce power consumption in logic circuits; however, the thermionic nature of the turn-off mechanism in MOSFETs forces a fundamental trade-off between leakage power and performance when the voltage is reduced. Tunneling field effect transistors (TFETs) could overcome this limitation since these devices have been theoretically shown to be capable of subthreshold slopes < 60 mV/decade [1]. However, the band gap of silicon (1.12 eV) is too large to provide acceptable drive currents in Si-based TFETs. TFETs fabricated using Si/SiGe heterojunctions [2] have the potential for increased drive current since the type-II band alignment reduces the effective band gap for tunneling at the source electrode. In this talk, I will show experimental results on Si/SiGe heterojunction tunneling transistors (HETTs), along with quantum transport simulations on a variety of heterojunction TFET geometries, and then describe the implications of these results on the viability of the Si/SiGe material system for TFET fabrication. Si/SiGe HETTs. The devices were fabricated using a conventional CMOS process flow that was modified to allow the source and drain electrodes to be formed in separate processing steps. The devices utilized SOI starting substrates and a high-κ/poly gate stack. The n drain was formed by conventional As implantation and anneal, while the source electrode was formed by selective etching of Si underneath the gate electrode and regrowth of in-situ-doped p Si1-xGex. Typical Id vs. Vgs characteristics at room temperature for HETTs with source Ge concentrations of 7% and 25% are shown in Fig. 2 [3]. The improved performance for the devices with x = 25% over x = 7% provides a clear indication of the heterojunction benefit on TFET performance. However, the devices fall short of achieving sub-60 mV/dec subthreshold slopes or the necessary drive currents for practical applications. Broken-gap TFETs. In order to further explore the heterojunction band structure requirements for TFETs, quantum transport simulations are performance on a variety of HETTs with band alignment ranging from staggered to broken gap [4]. The results, shown in Fig.3, indicate that the optimal performance is achieved in broken-gap heterojunction devices. These results further demonstrate the efficacy of the heterojunction design in improving TFET drive current, but also suggest that novel device geometries [5] or material systems with direct band gaps (e.g. III-Vs [6], graphene nanoribbons [7]) may be needed to achieve the performance levels necessary for practical applications. References. [1] J. Appenzeller, et al., Phys. Rev. Lett., 2004, [2] O. Nayfeh, et al., IEEE Elect. Dev. Lett., 2008, [3] S. J. Koester, et al., unpublished, [4] S. Koswatta, et al., IEDM, 2009, [5] A. Bowander, et al., VLSI., 2008, [6] S. Mookerjea, et al., IEDM, 2009, [7] Q. Zhang, et al., IEEE Elect Dev. Lett., 2008. n+ poly