A 70nm 16Gb 16-level-cell NAND Flash Memory

Noboru Shibata,Hiroshi Maejima,Katsuaki Isobe,Kiyoaki Iwasa,Michio Nakagawa,Masaki Fujiu,Takahiro Shimizu,Mitsuaki Honma,Satoru Hoshi,Toshimasa Kawaai,Kazunori Kanebako,Susumu Yoshikawa,Hideyuki Tabata,Atsushi Inoue,Toshiyuki Takahashi,Toshifumi Shano,Yukio Komatsu,Katsushi Nagaba,Mitsuhiko Kosakai,Noriaki Motohashi,Kazuhisa Kanazawa,Kenichi Imamiya,Hiroto Nakai

A 70nm 16Gb 16-level-cell NAND Flash Memory

2007

A 16 Gb 16-level-cell (16LC) NAND flash memory using 70 nm design rule has been developed. This 16LC NAND flash memory can store 4 bits in a cell which enabled double bit density comparing to 4-level-cell (4LC) NAND flash with the same design rule. New programming method achieves 0.62 MB/s programming throughput.

Keywords:

Non-volatile memory
Parallel computing
Computer science
Double data rate
Electronic engineering
CMOS
NAND gate
Flash file system
Computer hardware
CPU cache
Throughput
Flash memory
Logic gate

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