Old Web
English
Sign In
Acemap
>
Paper
>
DOUBLE PRECISION SPARSE MATRIX VECTOR MULTIPLICATION ACCELERATOR ON FPGA
DOUBLE PRECISION SPARSE MATRIX VECTOR MULTIPLICATION ACCELERATOR ON FPGA
2011
Sumedh Attarde
Siddharth Joshi
Yash Deshpande
Sunil Puranik
Sachin B. Patkar
Keywords:
Computer science
Field-programmable gate array
Double-precision floating-point format
Theoretical computer science
Sparse matrix-vector multiplication
Real-time computing
Computational science
Correction
Source
Cite
Save
Machine Reading By IdeaReader
0
References
0
Citations
NaN
KQI
[]