Session 29 overview: Optical- and electrical-link innovations

Advances in high-performance optical and electrical links are essential for the continued improvements in performance, power, and area demanded by current and future wireline communication systems. The papers presented in this section highlight developments in high-speed optical and electrical transceivers and clocking circuitry. It starts with a 64Gb/s NRZ optical receiver that utilizes a self-referenced bandwidth-optimized TIA co-optimized with a speculative 1-tap DFE to achieve −5.5dBm OMA sensitivity. The next paper describes a transmitter and receiver for 100Gb/s coherent networks with integrated 4×64GS/s 8b ADCs and DACs. This is followed by a paper that demonstrates the first 40Gb/s optical PAM-4 transmitter in zero-change 45nm SOI CMOS. The fourth paper proposes a new phase-domain equalization scheme, which compensates for more than 19dB of channel loss at 16Gb/s. The next paper presents clock generation, recovery, and distribution techniques for flexible-rate transceivers that can be programmed to operate at any rate from 3 to 10Gb/s. The session concludes with a paper that utilizes a time-division dual calibration scheme to improve reference spur performance of injection-locked all-digital PLLs.