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FPGA Implementation of Optimized Heterogeneous Adder for DSP Applications
FPGA Implementation of Optimized Heterogeneous Adder for DSP Applications
2014
S Ahish
Nikith G S
Aishwarya T
Arvind Prasad L
Keywords:
Computer architecture
Parallel computing
Field-programmable gate array
Digital signal processing
Computer science
Adder
Correction
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