Pentium MPP for OLTP applications

The paper describes a multi-Pentium architecture with a hierarchical memory and an I/O bus subsystem. On a board-level, this architecture achieves a very high-level of integration, by accommodating 8 Pentium processors with up to 2 Gigabytes of RAM. This hierarchical architecture has been extended to support multiple boards in a single cabinet as well as multiple cabinets connected via reflective memory. >