Old Web
English
Sign In
Acemap
>
Paper
>
Design of Complementary Raised-Drain Tunneling FET for Ultra-Low Voltage Applications
Design of Complementary Raised-Drain Tunneling FET for Ultra-Low Voltage Applications
2015
Y-B. Zhao
E. R. Hsieh
C. H. Chien
S.S. Chung
Keywords:
Quantum tunnelling
Electronic engineering
Low voltage
Materials science
Optoelectronics
Correction
Source
Cite
Save
Machine Reading By IdeaReader
0
References
0
Citations
NaN
KQI
[]