A design of video capture-output and pre-processing system based on FPGA

A FPGA-based video capture, output and pre-treatment system has been developed. The system adopts the I 2 C bus protocol and link-port data transfer protocol. And also it combines PAL video format to complete the process of video-capture, decode, encording and output. With the help of IP core provided by Altera company, it achieves the DDR controller, providing storage space for video images. Median filtering algorithm is used to achieve video pre-processing. Experimental verification, real-time acquisition video image of 25 frames/s can be displayed by system, and it completes better pre-processing algorithm to achieve purposes of noise reduction.