Design and simulation of a planar anode GTO thyristor on SiC

4H-SiC asymmetrical gate turn-off (GTO) thyristors have been simulated using the finite element code MEDICI/spl trade/. The goal of these numerical simulations is a performance analysis of GTO SiC-thyristors having a planar anode. One advantage over the conventional etched anode structure is the avoidance of lithography related problems appearing in the recessed gate groove. From a performance point of view the planar anode and gate geometries allow smaller distances and hence lower specific on-resistance as well as a higher dI/dt. After a detailed description of simulation tool, models used and their parameters, this paper focuses on the dV/dt sensitivity, on the blocking voltage attainable with JTE and on the influence of the geometry on the switching-on. Finally the results will be compared to recessed gate GTO thyristors on SiC.