Planar bias-tee circuit using single coupled-line approach for 71–76 GHz photonic transmitters

This paper presents a novel planar bias-tee (BT) circuit comprising a quarter-wave single coupled-line (SCL) section designed on 127 µm thick ROGERS RT/duroid 5880 laminate for E-band (71–76 GHz) wireless photonic transmitters. The BT circuit enables proper biasing for millimeter wave photodiodes (mm-wave PDs) through the RF-choke, and in addition, protects the hybrid integrated RF amplifier from being damaged by the DC voltage using the SCL DC-block. The planar RF-chock design is based upon two slotted split-ring resonators (SRRs) and is integrated in the DC bias line in order to prevent the leak of the RF signal into the voltage circuitry. Numerical results of the DC-block section show that in the entire 71–76 GHz band, the return loss (RL) is higher than 36 dB while the insertion loss (IL) is lower than 0.4 dB. The overall performance of the complete BT circuit (DC-block and RF-choke) has been calculated by the 3D full-wave electromagnetic field simulator based on the finite element method (RL > 20 dB, IL 30 dB). A via hole fencing surrounds the BT circuit to reduce the RF propagation losses into the laminate and to ensure that the grounded coplanar waveguide (GCPW) supports only a quasi-static TEM mode.