A 0.9-V 100- $\mu$ W Feedforward Adder-Less Inverter-Based MASH $\Delta\Sigma$ Modulator With 91-dB Dynamic Range and 20-kHz Bandwidth

A 0.9-V $\Delta \Sigma $ modulator integrated into a 0.18- $\mu \text{m}$ CMOS technology for digitizing signals in low-power devices is presented in this paper. To do so, a cascade (multistage noise shaping) architecture based on an adder-less feedforward structure is proposed. The proposed modulator has a unity signal transfer function in both stages of the modulator in order to reduce the integrator’s output swings. To mitigate the failure of slow process corner in the weak inversion as well as to further diminish the power consumption of the presented modulator, a fully differential self- and bulk-biased inverter-based operational transconductance amplifier is proposed. Experimental results are shown to demonstrate the efficiency of the proposed $\Delta \Sigma $ converter, showing state-of-the-art performance, by featuring 88.7-dB signal-to-noise ratio, 86.4-dB signal-to-noise plus distortion ratio, and 91-dB dynamic range within a signal bandwidth of 20 kHz, with a power dissipation of $103.4~\mu \text{W}$ when the circuit is clocked at 5.12 MHz.