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CoMPARE: A Simple Reconfigurable Processor Architecture Exploiting Instruction Level Parallelism
CoMPARE: A Simple Reconfigurable Processor Architecture Exploiting Instruction Level Parallelism
1998
Sergej Sawitzki
Achim Gratz
Rainer G. Spallek
Keywords:
Application-specific instruction-set processor
Computer architecture
Very long instruction word
Parallel computing
Programming paradigm
Instruction-level parallelism
Minimal instruction set computer
Microarchitecture
Computer science
Instruction set
Correction
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