Evaluation of Fatigue Crack Growth in Solder Layer of IGBT Module under Power Cycle by Using J-integral Method

In this paper, finite element simulation and J-integral method were used to evaluate the fatigue crack growth in solder layer of IGBT module under power cycle. The variations of J-integral value with different crack lengths in SAC305 solder were calculated. The maximum J-integral values of crack for solder layer in Si/SAC305/Cu, SiC/SAC305/Cu, and Si/Pb92.5Sn5Ag2.5 /Cu were calculated, respectively. The results show that when the crack tip is located at the edge of the solder layer, the crack growth rate is larger than that at the center of the solder layer. The change value of J-integral tends to be stable when the crack length is greater than 1 mm. The maximum J-integral value of crack for SAC305 is larger than that for Pb92.5Sn5Ag2.5. The maximum J-integral value of crack for solder layer in SiC/SAC305/Cu is smaller than that in Si/SAC305/Cu. The results of this paper can help to screen out the IGBT module with crack defects but still meet the use requirements, and improve its reliability.