Buffer mechanism implementation method and device for interactive type programmable hardware

2015 
The invention discloses a buffer mechanism implementation method and a buffer mechanism implementation device for interactive type programmable hardware. The buffer mechanism implementation method comprises the following steps: S1, receiving an operation order and converting the operation order into an order capable of being recognized by hardware; S2, comparing the order capable of being recognized by hardware with orders stored in an order buffer region to determine whether similar orders exist or not, if yes, replacing the corresponding similar order stored in the buffer region with the order capable of being recognized by hardware, otherwise, judging whether the order buffer region is full or not, if yes, replacing a first order of the order buffer region with the order capable of being recognized by hardware, otherwise, writing the order capable of being recognized by hardware into the order buffer region. According to the buffer mechanism implementation method, an order buffer mechanism is set in a communication process of an upper computer and a lower computer to relieve hardware pressure of the lower computer and control an order transmission rate of the upper computer, thereby avoiding breakdown, due to a too high order rate, of the hardware equipment of the lower computer.
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