Influence of process parameters on plasma damage during inter-metal dielectric deposition

Indispensable in modern CMOS manufacturing, plasma processes can lead to a latent damage to the gate oxide. We are presenting data from a year-long study intended to reduce the damage due to inter-metal dielectric (IMD) plasmaassisted deposition. We obtained excellent results by reducing process temperature and chamber power settings, and by changing the recipe used to deposit the first layer of dielectric. Two different mechanisms active during IMD deposition can explain all data: the photoemission due to plasma radiation and the charging resulting from ion bombardment on exposed metal surfaces.