Fabrication of NbN josephson junction integrated circuits using Si insulation layer

In the fabrication of Josephson junction integrated circuit, it is most important to align the superconducting critical current ImO of the junction. This paper reports a fabrication of interlayer insulating film with a view to reducing the fluctuation of ImO of NbN-Oxide-PbInAu junction of 1.5 μm. The main cause of the fluctuation of ImO is the variation of the junction area due to remnant of interlayer SiO insulating film generated in the aperture of the junction. To solve this problem, several interlayer insulators other than SiO have been investigated. It is found that Si is appropriate for forming the junction aperture without remnant. The Si film fabricated by evaporation has been a film close to amorphous. The pinhole defect density is 10/cm2 (film thickness 300 nm), which is smaller by two orders of magnitude than the one in SiO films. When Si films are used for interlayer insulation of NbN Josephson junction devices, the maximum distribution width of ImO is ±12% (σ ± 8%), which is about 1/2 for the case of SiO films. Usefulness of the film has been confirmed in application to the interlayer insulation film of the logic array with 750 gates. The measured delay time of a chain circuit made for trial is 14 ps/gate in a 2 input OR gate.