Low complexity and high throughput VLSI architecture for AVC/H.264 CAVLC decoding
2009
This paper introduces a low complexity VLSI hardware architecture for entropy coding with increased throughput, based on the study of the statistical properties of the Context-based Adaptive Variable Length Coding (CAVLC) in AVC/H.264. These enhanced designs are due to the results of the statistical analyses, in which better symbol length prediction was achieved by breaking the recursive dependency among codewords for multi-symbol decoder implementation. The proposed CAVLC decoder can also easily meet real-time requirements for High Definition (HD) (1920×1080) applications, while the clock speed is operated only at 13 MHz under the best case scenario.
Keywords:
- Correction
- Source
- Cite
- Save
- Machine Reading By IdeaReader
14
References
2
Citations
NaN
KQI