Dynamic partial FPGA reconfiguration in space applications
2012
Design and implementation of hardware mock-up of high performance system for general avionics testing in
reconfigurable FPGAs. Strong emphasis is put on exploiting dynamic partial reconfiguration capability as a method for
functionality multiplexing and fault mitigation. Additionally, dynamic reconfiguration can be used for fault injection
which makes Single Event Upset in configuration memory simulation possible. LEON3 processors are used to create an
avionic systems test-bed, for testing the mock-ups of real system flight software and testing dynamic full and partial
reconfiguration. Experiments with different means of reconfiguration are performed to measure reconfiguration times
and stability of software. Several solutions for whole system reconfiguration controller have been implemented and
tested.
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