A semiconductor memory device

PROBLEM TO BE SOLVED: To appropriately achieve setting operation by setting a suitable compliance current for each memory cell while preventing occurrence of an incorrect reset action and destruction of the memory cell, irrespective of fluctuation in a resistance value of the memory cell. SOLUTION: A current limiting circuit 106 controls a cell current Icell flowing to the memory cell MC at the time of setting operation so as to make it not to exceed the compliance current Icomp. The current limiting circuit 106 generates the compliance current Icomp which is α times as large as a cell current Icellsw at certain timing. This compliance current Icomp is fed into a current route 50. COPYRIGHT: (C)2011,JPO&INPIT