Exploiting Active Learning for Microcontroller Performance Prediction

Speed monitors provide on-chip measurements of the the performance of integrated circuits. In recent years, they have been extensively used to predict F max of microcontrollers for speed binning and performance screening during production test. However, while the use of machine learning is getting increasingly popular, the models may become significantly inaccurate if not trained on the appropriate devices. Previous research has demonstrated how to predict performance from speed-monitor data using corner-lot wafers. We show how to extend this approach to select the best corner-lot wafers to label when preparing the training set, thus significantly reducing the time and cost required for the process.