Cell Ratio Tuning for High-Density SRAM Voltage Scaling With Inserted-Oxide FinFETs

A scheme for controllably adjusting transistor drive strength in inserted-oxide FinFET (iFinFET) technology is proposed, to enable cell ratio tuning for a minimally sized six-transistor (6T) SRAM cell. Specifically, one or more of the stacked nanowire channels within an iFinFET can be made to be essentially non-conducting by ion implantation to increase its threshold voltage. Via 3-D device simulations and a calibrated compact $I$ – $V$ model, this scheme is projected to enable more than 0.1 V reduction in minimum cell operating voltage ( $V_{\mathrm {MIN}})$ for a 6T SRAM high-density cell design.