Investigation of Integrated mmW-Downconverter VCOs in SiGe for Offset-PLL FMCW-Transceivers

This paper presents and compares two inherently different LC-VCO architectures for the down-conversion in a offset-PLL. The cross-coupled VCO architecture, which is unpopular in mmW SiGe applications, is compared to the commonly used Colpitts architecture. The two VCOs are fabricated with a supply voltage of 3.3 V in a modern 130 nm SiGe BiCMOS technology with HBTs offering an $f_{\mathrm{T}}$ of 250 GHz and $f_{\max}$ of 370 GHz. For easier characterization and stabilization in a PLL the same static divide-by-4 chain is added to both VCO chips. The main purpose of this work is the integration of a VCO as a downconverter for a offset-PLL with good phase noise and low power consumption at the same time. At an offset of 1 MHz the Colpitts VCO achieves a phase noise of −108 dBc/Hz at 56 GHz and the cross-coupled VCO achieves a phase noise of −100 dBc/Hz at 68 GHz, respectively. Relative frequency tuning ranges (rFTR) of 26% for the Colpitts type and 43.7% for the cross-coupled VCO are reached.